Reducing evaluation cost for circuit synthesis using active learning (bibtex)

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REDUCING EVALUATION COST FOR CIRCUIT SYNTHESIS USING ACTIVE LEARNING

T. Guo, D. R. Herber, J. T. Allison


[DOI] [PDF]

HTML Reference:

T. Guo, D. R. Herber, J. T. Allison. 'Reducing evaluation cost for circuit synthesis using active learning.' In ASME 2018 International Design Engineering Technical Conferences, DETC2018-85654, p. V02AT03A011, Quebec City, Canada, Aug 2018.

BibTeX Source:

@Inproceedings{Guo2018d,
  title                    = {Reducing evaluation cost for circuit synthesis using active learning},
  Address                  = {Quebec City, Canada},
  Author                   = {Guo, Tinghao and Herber, Daniel R and Allison, James T},
  Booktitle                = {ASME 2018 International Design Engineering Technical Conferences},
  Month                    = aug,
  Year                     = {2018},
  Number                   = {DETC2018-85654},
  Pdf                      = {http://systemdesign.illinois.edu/publications/Guo2018d.pdf},
  pages = {V02AT03A011},
  doi = {10.1115/DETC2018-85654},
}

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